Synopsys Expands TSMC Collaboration With AI-Driven EDA And Broad IP Solutions Enable Differentiated Designs On TSMC Advanced Processes And SoIC Technologies

AI-Driven EDA and Broad IP Solutions Enable Differentiated Designs on TSMC Advanced Processes and SoIC Technologies

Key Highlights 

• Certified digital and analog flows on the TSMC N2P and A16™ processes using TSMC NanoFlex™ architecture boost performance and speed analog design migration
• 3DIC Compiler platform and 3D-enabled IP enable multiple customer tape outs using advanced 3D stacking and CoWoS packaging technologies
• AI-optimized photonic flow for TSMC Compact Universal Photonic Engine (TSMC-COUPE™) technology enhances system design performance and addresses multi-wavelength and thermal requirements
• Industry's broadest IP portfolio, on TSMC N2/N2P, optimized for low power, speeds path to silicon success and reduces integration risk

SUNNYVALE, Calif., Sept. 24, 2025 /PRNewswire/ -- Synopsys, Inc. (NASDAQ:SNPS) announced today its ongoing close collaboration with TSMC to deliver multi-die solutions, encompassing advanced EDA and IP products, that support TSMC's leading-edge processes and packaging technologies, driving innovation in AI chip and multi-die design. The 3DIC Compiler exploration-to-signoff platform and IP, tuned for 3D packaging, along with the company's partnership with TSMC on design enablement has resulted in multiple customer tape-outs.

Building on Synopsys' continued collaboration with TSMC is the availability of certified digital and analog flows, along with the enabled Synopsys.ai™ on TSMC's N2P and A16™ processes using TSMC NanoFlex™ architecture. In addition, Synopsys provides robust automotive IP solutions for TSMC N5A and N3A processes and best-in-class Interface and Foundation IP solutions, delivering highest level of safety, security and reliability while enabling maximum performance with the lowest power for advanced chips.