熱門資訊> 正文
Cadence的新RTL AI代理将芯片设计面积削减24%,功耗削减18%
2026-09-22 21:36
- Cadence Design Systems (CDNS) said on Tuesday that it launched a new RTL Generation Agent for its ChipStack AI Super Agent to automate parts of digital chip design using natural-language prompts.
- The agent can turn chip specifications into RTL code, analyze designs, and refine them for power, performance, and area (PPA).
- In early testing, the tool reduced chip area by 24% and power consumption by 18% on average versus foundation-model code generation while maintaining 100% functional accuracy.
- The new agent also supports AI-driven updates to existing RTL, helping engineers adapt designs to new requirements, functionality, and PPA targets.
- Honda (HMC)'s R&D is evaluating the technology for next-generation automotive SoCs to improve chip development productivity.
- The expanded ChipStack AI Super Agent capabilities are expected to be available to select customers in Q4 2026.
- On the market side, the CDNS stock traded 1% higher at ~$298.01.
- Source: Press Release
More on Cadence Design Systems
- Cadence Design Systems, Inc. (CDNS) Presents at Goldman Sachs Communacopia + Technology Conference 2026 Transcript
- Cadence Design Systems: Buy The Dip Opportunity (Technical Analysis)
- Cadence Design Systems, Inc. (CDNS) Presents at Deutsche Bank 2026 Technology Conference Transcript
- Notable tech headlines for the week: Nvidia, Dell, Broadcom in focus
- Sandisk leads Nasdaq's weekly gainers; Autodesk drags
風險及免責提示:以上內容僅代表作者的個人立場和觀點,不代表華盛的任何立場,華盛亦無法證實上述內容的真實性、準確性和原創性。投資者在做出任何投資決定前,應結合自身情況,考慮投資產品的風險。必要時,請諮詢專業投資顧問的意見。華盛不提供任何投資建議,對此亦不做任何承諾和保證。